1. Field of the Invention
The present invention relates to a semiconductor package and a method for manufacturing the same, and more particularly to a semiconductor package having lead bars and a method of manufacturing the same.
2. Description of the Prior Art
Referring to FIG. 1, a conventional semiconductor package is illustrated. As shown in FIG. 1, the semiconductor package includes a lead frame 11 constituted by a plurality of inner leads 3, a plurality of outer leads 4, and a paddle 2 integral with the leads 3 and 4. Semiconductor chips 1 are fixedly mounted on the paddle 2 of the lead frame 11 by means of an adhesive. This mounting of the semiconductor chips 1 is achieved by use of a sawing process. The inner leads 3 which are symmetrically arranged at both sides of the semiconductor chips 1 are electrically connected to connecting terminals of the semiconductor chips 1 by means of metal wires 5 made of gold or aluminum, respectively. This connection of the inner leads 3 is achieved by use of a wire bonding process. The resulting structure is molded in a mould by using a molding resin 6. The molding is carried out such that the outer leads 4 are outwardly protruded from the molded structure. The protruded outer leads 4 are then subjected to a trimming process, a forming process and a plating process. Thus a semiconductor package shown in FIG. 1 is produced.
In manufacture of such a semiconductor package, first, a die bonding process step is carried out for fixedly mounting individual semiconductor chips 1 on the paddle 2 of the lead frame 11 by means of an adhesive by use of the sawing process. Thereafter, a wire bonding process step is performed for electrically connecting bonding pads of the semiconductor chips 1 with the corresponding inner leads 3 of the lead frame 11, respectively. A molding process step is then performed for enclosing a predetermined portion of the resulting structure including the semiconductor chips 1 and the inner leads 3 of the lead frame 11 by a molding compound 6. By this molding, a package is produced. Subsequently, the package is subjected to a trimming process step, a forming process step and a plating process step.
At the trimming and forming process steps, connecting bars (not shown) supporting the paddle 2 and dam bars (not shown) supporting the leads are cut. At these steps, the outer leads 4 are bent to have a predetermined shape. The trimming and forming process steps are individually carried out. According to the bent shape of the outer leads 4, various types of surface-on-mounting packages such as a small out-line J-lead package and a dual in-line package may be obtained. Where a memory extension is desired, the produced semiconductor package is electrically connected to a printed circuit board 8 by use of conductive bumps 7, as shown in FIG. 3.
The semiconductor package assembled in the above-mentioned manner is used after subjecting an electrical characteristic test. The semiconductor package is mounted in a surface-on-mounting manner or a insertion manner to a circuit board of various appliances or sets, in accordance with the type thereof, to perform a desired operation.
However, the above-mentioned conventional semiconductor package is expensive due to the use of complex manufacture process steps. Since the metallic paddle 2 is disposed in the package, a breakage of the package may occur due to a thermal expansion coefficient difference between the semiconductor chip 1 and the paddle 2 when the package is subjected to a reflow soldering process. Furthermore, the elongated metal wires 5 may degrade the electrical characteristic of the semiconductor chip.
In this semiconductor package, a larger mounting area is required when the semiconductor package is mounted on a printed circuit board. This is because leads of the lead frame are excessively protruded outwardly of a molding portion of the package. In addition, it is impossible to mount semiconductor packages in a stacked manner because leads are arranged along the bottom of each semiconductor package.